Sunday, December 9, 2012

sn74lvc3g34.pdf download Texas Instruments TI pdf datasheet

· Available in the Texas Instruments  · Ioff Supports Partial-Power-Down Mode 
NanoFree Package " Operation 
· Supports 5-V VCC Operation  · Latch-Up Performance Exceeds 100 mA Per 
· Inputs Accept Voltages to 5.5 V  JESD 78, Class II 
· Max tpd of 4.1 ns at 3.3 V · Low Power Consumption, 10-mA Max ICC  · ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) 
· ±24-mA Output Drive at 3.3 V  – 200-V Machine Model (A115-A) 
· Typical VOLP (Output Ground Bounce)  – 1000-V Charged-Device Model (C101) 
<0.8 V at VCC = 3.3 V, TA = 25°C 
· Typical VOHV (Output VOH Undershoot) 
>2 V at VCC = 3.3 V, TA = 25°C 
This triple buffer gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC3G34 performs the Boolean
function Y = A in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.

Click following link:
DatasheetDoc-Texas Instruments TI pdf datasheet download


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