Friday, December 7, 2012

spns176.pdf download Texas Instruments TI pdf datasheet

spns176.pdf RM48Lx30 RM48L530 RM48L730 RM48L930
 
1 RM48Lx30 16/32-Bit RISC Flash Microcontroller   
1.1 Features   
?High-Performance Microcontroller for Safety Critical Applications  ?Multiple Communication Interfaces ?USB 
?Dual CPU抯 running in lockstep ?ECC on flash and RAM interfaces ?Built-In Self Test for CPU and on-chip RAMs ?Error Signaling Module with Error Pin ?Voltage and Clock Monitoring ?ARM?Cortex??R4F 32-bit RISC CPU ?Efficient 1.6DMIPS/MHz with 8-stage pipeline ?Floating-Point Unit with Single/Double Precision ?12-Region Memory Protection Unit ?Open Architecture with 3rd Party Support ?Operating Conditions ?Up to 200MHz System Clock ?Core Supply Voltage (VCC): 1.2V nominal ?I/O Supply Voltage (VCCIO): 3.3V nominal ?Integrated Memory ?Up to 3MB Program Flash with ECC  ?2-port USB Specification, revision 2.0-compatible host controller, based on the OHCI Specification for USB, release 1.0 ?One full-speed USB device compatible with the USB Specification, revision 2.0 and USB Specification, revision 1.1 ?Three CAN Controllers (DCAN) ?64 mailboxes with parity protection each ?Compliant to CAN protocol version 2.0B ?Inter-Integrated Circuit (I2C) ?Three Multi-buffered Serial Peripheral Interfaces (MibSPI) ?128 Words with Parity Protection each ?Two Standard Serial Peripheral Interfaces (SPI) ?Local Interconnect Network Interface (LIN) Controller 
?Up to 256KB RAM with ECC ?64KB Flash for emulated EEPROM  ?Compliant to LIN protocol version 2.1 ?Standard Serial Communication Interface 
?16-bit External Memory Interface  (SCI) 
?Common Platform Architecture  ?Two High-End Timer Modules (N2HET) 
?Consistent memory map across family  ?N2HET1: 32 programmable channels 
?Real-Time Interrupt Timer (RTI) OS Timer  ?N2HET2: 20 programmable channels 
?96-channel Vectored Interrupt Module (VIM) ?2-channel Cyclic Redundancy Checker (CRC) ?Direct Memory Access (DMA) Controller ?16 Channels and 32 Control Packets  ?160 Word Instruction RAM with parity protection each ?Each includes Hardware Angle Generator ?Dedicated Transfer Unit for each N2HET 
?Parity protection for control packet RAM ?DMA Accesses Protected by Dedicated MPU ?Frequency-Modulated Phase-Locked-Loop (FMPLL) with Built-In Slip Detector ?Separate Non-Modulating PLL ?IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight Components  (HTU) ?Two 10/12-bit Multi-Buffered ADC Modules ?ADC1: 24 channels ?ADC2: 16 channels ?16 shared channels ?64 result buffers with parity protection each ?Packages 
?JTAG Security Module  ?144-pin Quad Flatpack (PGE) [Green] 
?Trace and Calibration Capabilities  ?337-Ball Grid Array (ZWT) [Green] 
?Embedded Trace Macrocell (ETM-R4) 
?Data Modification Module (DMM) 
?RAM Trace Port (RTP) 
?Parameter Overlay Module (POM) 
 
1.2 Applications
• Industrial Safety Applications
– Industrial Automation
– Safe PLC's (Programmable Logic Controllers)
– Power Generation and Distribution
– Turbines and Windmills
– Elevators and Escalators
• Medical Applications
– Ventilators
– Defibrillators
– Infusion and Insulin pumps
– Radiation therapy
– Robotic surgery
 
1.3 Description
The RM48Lx30 is a high performance microcontroller family for safety systems. The safety architecture
includes Dual CPUs in lockstep, CPU and Memory Built-In Self Test (BIST) logic, ECC on both the Flash
and the data SRAM, parity on peripheral memories, and loop back capability on peripheral IOs.
The RM48Lx30 integrates the ARM® Cortex™-R4F Floating Point CPU which offers an efficient 1.6
DMIPS/MHz, and has configurations which can run up to 200MHz providing up to 320 DMIPS. The device
supports the little-endian [LE32] format.
The RM48Lx30 has up to 3MB integrated Flash and up to 256KB data RAM configurations with single bit
error correction and double bit error detection. The flash memory on this device is a nonvolatile,
electrically erasable and programmable memory implemented with a 64-bit-wide data bus interface. The
flash operates on a 3.3V supply input (same level as I/O supply) for all read, program and erase
operations. When in pipeline mode, the flash operates with a system clock frequency of up to 200MHz.
The SRAM supports single-cycle read/write accesses in byte, halfword, and word modes.
The RM48Lx30 device features peripherals for real-time control-based applications, including two Next
Generation High End Timer (N2HET) timing coprocessors with up to 44 total IO terminals and a 12-bit
Analog-to-Digital converter supporting up to 24 inputs.
 

 
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