sn74lvc1gx04.pdf
| · Available in Texas Instruments NanoStar " | · ±24-mA Output Drive at 3.3 V |
| and NanoFree Packages " | · Ioff Supports Partial-Power-Down Mode |
| · Supports 5-V VCC Operation | Operation |
| · Inputs Accept Voltages to 5.5 V | · Latch-Up Performance Exceeds 100 mA Per |
| · One Unbuffered Inverter (SN74LVC1GU04) | JESD 78, Class II |
| and One Buffered Inverter (SN74LVC1G04) | · ESD Protection Exceeds JESD 22 |
| · Suitable for Commonly Used Clock | – 2000-V Human-Body Model (A114-A) |
| Frequencies: | – 200-V Machine Model (A115-A) |
| – 15 kHz, 3.58 MHz, 4.43 MHz, 13 MHz, 25 MHz, 26 MHz, 27 MHz, 28 MHz | – 1000-V Charged-Device Model (C101) |
| · Max tpd of 2.4 ns at 3.3 V | |
| · Low Power Consumption, 10-mA Max ICC |
DESCRIPTION/ORDERING INFORMATION
The SN74LVC1GX04 is designed for 1.65-V to 5.5-V VCC operation. This device incorporates the
SN74LVC1GU04 (inverter with unbuffered output) and the SN74LVC1G04 (inverter) functions into a single
device. The LVC1GX04 is optimized for use in crystal oscillator applications.
X1 and X2 can be connected to a crystal or resonator in oscillator applications. The device provides an
additional buffered inverter (Y) for signal conditioning (see Figure 3). The additional buffered inverter improves
the signal quality of the crystal oscillator output by making it rail to rail.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff (Y output only). The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down.
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