sn74lvc2g00.pdf
Features
| · Available in the Texas Instruments | · Typical VOHV (Output VOH Undershoot) |
| NanoFree Package " | >2 V at VCC = 3.3 V, TA = 25°C |
| · Supports 5-V VCC Operation | · Ioff Supports Partial-Power-Down Mode |
| · Inputs Accept Voltages to 5.5 V | Operation |
| · Max tpd of 4.3 ns at 3.3 V · Low Power Consumption, 10-mA Max ICC · ±24-mA Output Drive at 3.3 V · Typical VOLP (Output Ground Bounce) <0.8 V at V = 3.3 V, T = 25°C | · Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II · ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 1000-V Charged-Device Model (C101) |
DESCRIPTION/ORDERING INFORMATION
This dual 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G00 performs the Boolean function Y = A × B or Y = A + B in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
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DatasheetDoc-Texas Instruments TI pdf datasheet download
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